Colorado Springs, CO, U.S.A. --- (METERING.COM) --- April 10, 2008 – Ramtron International Corporation, a developer and supplier of non-volatile ferroelectric random access memory (F-RAM) and integrated semiconductor products, has unveiled the industry’s first 2 megabit (Mb) serial F-RAM memory in an 8-lead TDFN (5.0 x 6.0 mm) package. Manufactured on an advanced 130 nanometer CMOS process, the FM25H20 operates at low power and features a high-speed serial peripheral interface (SPI). The 3-volt, 2 Mb serial F-RAM writes at maximum bus speed with virtually unlimited endurance for greater data collection capacity in a tiny package, enabling system designers to reduce costs and board space in a range of advanced applications, including meters and printers.

The FM25H20 is an ideal replacement for serial Flash in sophisticated electronic systems that require low power and minimal board space. F-RAM benefits over Flash include significantly lower operating currents, faster writes, and write endurance that is orders of magnitude greater than Flash.

“The 2 Mb serial F-RAM is a natural extension for our metering and printer customers who want to increase data collection capacity in their next-generation applications without increasing board space,” says Duncan Bennett, Ramtron Strategic Manager. “The FM25H20 offers our half megabit serial F-RAM customers quadruple the memory in the same small footprint.”

The FM25H20 is organized as a 256K x 8 bit non-volatile memory that reads and writes at bus speed up to 40MHz, with essentially unlimited endurance, 10-year data retention, and low operating currents. The device incorporates an industry-standard SPI interface that optimizes F-RAM’s high-speed write capability. A hardware and software write protection feature is also included on the FM25H20 to prevent inadvertent writes and data corruption. The device is based on Texas Instruments’ 130 nanometer (nm) CMOS manufacturing process; only two additional mask steps have been used to embed the nonvolatile F-RAM module within the standard CMOS 130 nm logic process.